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Sixteen miles north of Albuquerque, in Rio Rancho, New Mexico, an Intel chip plant sits on more than 200 acres of land. The site was first established in the 1980’s, part of it built on top of a sod farm. In 2007, as Intel’s business faltered, operations in one of the key fabs, Fab 9, came to a halt. Employees say families of raccoons and a badger took up residence in the space.
Then, in January 2024, the dormant fab was booted up again. Intel funneled billions into the facility, including $500 million it was granted from the US CHIPS Act. Now, Fab 9 and its neighbor, Fab 11X, are critical infrastructure for one of Intel’s quietly fast-growing businesses: Advanced chip packaging.
Packaging involves combining multiple chiplets, or smaller components, onto a single, custom chip. Over the past six months, Intel has been signaling that its advanced packaging business, which operates within the Foundry chip-making arm of the company, is having a growth spurt. The company’s efforts around this have it going head-to-head with Taiwan Semiconductor Manufacturing Corporation, which far surpasses Intel’s production in terms of scale. But in an era where AI is driving demand for all kinds of computing power, and leading nearly every major tech company to consider making its own custom chips, Intel thinks this effort can help it grab a bigger slice of the AI pie.
During a quarterly earnings call in January, Intel CEO Lip-Bu Tan claimed that Intel’s packaging is a “very big differentiator” from competitors. Chief financial officer Dave Zinsner said on the same call that the company expects to see revenue from packaging “come in even before we start to see meaningful wafer revenue.” Zinsner said he had revised his packaging revenue projections over the past 12 to 18 months, from hundreds of millions of dollars to “well north of $1 billion.”
Zinsner elaborated on this in March at the Morgan Stanley Technology, Media, and Telecom conference, when he called Intel's packaging “ironically, the more interesting part of the Foundry business today,” adding that the company was “close to closing some deals that are in the billions of dollars per year, in terms of revenue on packaging.”
Multiple sources say that Intel has been in ongoing talks with at least two large customers for its advanced packaging services: Google and Amazon, which both make their own custom chips but outsource parts of the fabrication process. These deals would be a boon for beleaguered chipmaker Intel, which is attempting a comeback—partially funded by the US government—after years of stagnation and missing out on mobile chips.
A spokesperson for Google, Lee Fleming, declined to comment, saying that Google doesn’t publicly discuss its supplier relationships. Amazon also declined to comment. Intel said it does not comment on specific customers.
Intel’s ambitions for its advanced packaging business depend largely on whether the company can secure outside customers like these tech giants. Since 2024, the company has effectively been split into two: There’s the longstanding “product” side, where Intel designs and sells cost-efficient CPUs to PC makers and data centers; and the aspirational Foundry side, where Intel makes advanced semiconductors.
Intel’s Foundry plans and the number of advanced chip systems it can yield are closely-watched signals amongst tech analysts and investors, who in recent years have seen Intel cycle through CEOs and start and stop fab buildouts. Zinsner, for one, said at the Morgan Stanley conference that he now believes Intel Foundry’s packaging business can achieve the same 40 percent gross margins that it claims on the rest of its products.
It’s still an extremely challenging proposition. “Packaging is not as easy as saying, ‘I want to run 100,000 wafers per month,’” says Jim McGregor, a longtime chip industry analyst and the founder of Tirias Research, referring to a continuous flow of chips in various stages of production. “It really comes down to whether Intel’s [packaging] fabs can make deals. If we see them expanding those operations more, that’s an indicator that they have.”
Last month, Anwar Ibrahim, the prime minister of Malaysia, revealed in a post on Facebook that Intel is expanding its Malaysian chip-making facilities, which were first established back in the 1970s. Ibrahim said the head of Intel’s Foundry, Naga Chandrasekaran, had “outlined plans to commence the first phase” of expansion, which would include advanced packaging.
“I welcome Intel's decision to begin operations for the complex later this year,” a translated version of Ibrahim’s post read. An Intel spokesperson, John Hipsher, confirmed that it’s building out additional chip assembly and test capacity in Penang, “amid rising global demand for Intel Foundry packaging solutions.”
Package Store
According to Chandrasekaran, who took over Intel’s Foundry operations in 2025 and spoke exclusively with WIRED during the reporting of this story, the term “advanced packaging” itself didn’t exist a decade ago.
Chips have always required some sort of integration of transistors and capacitors, which control and store energy. For a long time the semiconductor industry was focused on miniaturization, or, shrinking the size of components on chips. As the world began demanding more from its computers in the 2010s, chips started to get even more dense with processing units, high-bandwidth memory, and all of the necessary connective parts. Eventually, chipmakers started to take a system-in-packages or package-on-package approach, in which multiple components were stacked on top of one another in order to squeeze more power and memory out of the same surface space. 2D stacking gave way to 3D stacking.
TSMC, the world’s leading semiconductor manufacturer, began offering packaging technologies like CoWoS (chip on wafer on substrate) and, later, SoIC (system on integrated chip) to customers. Essentially, the pitch was that TSMC would handle not just the front end of chip-making—the wafer part—but also the back end, where all of the chip tech would be packaged together.
Intel had ceded its chip manufacturing lead to TSMC at this point, but continued to invest in packaging. In 2017 it introduced a process called EMIB, or embedded multi-die interconnect bridge, which was unique because it shrunk the actual connections, or bridges, between the components in the chip package. In 2019, it introduced Foveros, an advanced die-stacking process. The company’s next packaging advancement was a bigger leap: EMIB-T.
Announced last May, EMIB-T promises to improve power efficiency and signal integrity between all the components on the chips. One former Intel employee with direct knowledge of the company’s packaging efforts tells WIRED that Intel’s EMIB and EMIB-T are designed to be a more “surgical” way of packaging chips than TSMC’s approach. Like most chip advancements, this is supposed to be more power efficient, save space, and, ideally, save customers money in the long runThe company says EMIB-T will roll out in fabs this year.
Unsurprisingly, AI has been a big catalyst for these changes. “Because of AI, advanced packaging has really come to the forefront,” Chandrasekaran said. “Even more so than the silicon itself, chip packaging is going to transform how this AI revolution comes to fruition over the next decade.”
Intel began readying for mass production of EMIB-T in Rio Rancho, New Mexico. The Rio Rancho facility houses around 2700 Intel employees, roughly 200 less than it had last year; Tan slashed Intel’s workforce after he took over as CEO. The surrounding land is arid desert. As is the case with a lot of tech infrastructure expansions, local advocacy groups have expressed serious concerns about Intel’s water usage and the fumes the plant is giving off. (Intel claims it recycles water at the Rio Rancho site.)
A short tour inside Rio Rancho’s Fab 9 doesn’t reveal much to the untrained eye. It’s slightly less “clean” than Intel’s Fab 52 semiconductor plant in Arizona, since its method of removing air particles is different there, but the standard clean room precautions and sanitized, zipped-up suits are still required for entry. Inside the fab, hair-thin silicon wafers are mounted, diced, and mold-grinded.
Katie Prouty, the Rio Rancho site plant manager and a 31-year veteran of Intel, emphasizes during a walk-through that one of Intel’s selling points for advanced packaging is that customers can opt to use Intel for any part of the process, or, “enter and exit the highway” at any point. A customer can, for example, purchase wafers from one entity, then come to Intel’s fabs for the next step; or contract with an outsourced semiconductor assembly and test company for traditional chip packaging, then use Intel for advanced packaging.
“That’s not something Intel did before. We never took in other customers’ wafers,” Prouty said. “That’s been a huge mindset shift.”
Competent, cutting-edge technology? Check. Chips packaged specifically for AI? Check. Flexibility for customers with certain needs? Check. So: Where are all the customers?
One former Intel employee, speaking on background, said that Intel’s target packaging customers may be hesitant to announce partnerships with Intel for a couple reasons. They’re either waiting to see if the company can deliver on its fab expansion promises, or they’re concerned TSMC could potentially allocate fewer wafers to customers once they say they’re using Intel for packaging. It’s not the tech itself they would be taking a risk on, the former employee added; it’s the broader market dynamics.
Chandrasekaran is more circumspect. “I think we want to be very disciplined around the idea of: We don’t talk about our customers. Successful foundries don’t say, ‘We have signed up these customers.’ We want the customers to talk about our product.”
Intel may want to consider adopting another motto: If they come, we will build it—and at great capital expense.The big indicator that the customers have arrived, Chandrasekaran says, will be a notable jump in Intel Foundry’s spending. “As we sign up these customers, we’ll have to increase our capital expenditures,” he says. “And then the street will see it.”
